Session 6. All things PL, Enhanced DSP58, Etc.

Utilizing and optimizing programmable logic

• CLB structure
• Memory resources, LUT-RAM, BRAM, URAM
• Using and optimizing DSP58 slices
• Pros and cons of HDL coding versus HLS
• HDL coding techniques and recommendations
• Synthesis and compiler optimization
• Synchronous design techniques
• Clocking techniques and recommendations
• Managing control sets
• Interfacing to AIE
• Timing closure techniques for PL fabric